Hands-on training organized on Verilog HDL

ALIGARH  : The Electronics Engineering Section, University Women’s Polytechnic, Aligarh Muslim University organized a two-day hands-on training on “Verilog HDL”. Dr. Mohd Tausif, Assistant Professor in Department of Electronics Engineering, AMU, was the resource person. More than 80 students and faculty members had registered to attend the training.

Dr. Mohd Tausif and his team explained the basics concepts of Verilog HDL programming and its practical applications in designing digital circuits using Field Programmable Gate Arrays (FPGA).

Dr. Salma Shaheen, Principal, welcomed the guests and urged the participants to learn the basics of Verilog HDL diligently as it will help them greatly in understanding the intricacies of digital circuits.

Dr. Mohd Ajmal Kafeel, Convener of the programme, highlighted the importance of digital design and assured to arrange more such technical events.

Dr. Shahnawazuddin, Dr. Amir Baig, Mr. Mohd Kashif, Ms. Atifa Aqueel, Ms. S. Shira Moin and Mr. Shahbaz Hussain chaired the different technical sessions during the event.