Union Minister Rajeev Chandrasekhar to Inaugurate Synopsys’ Chip Design Centre at DLF Tech Park in Noida

Union Minister of State for Electronics and IT, Skill Development and Entrepreneurship, and Jal Shakti, Shri Rajeev Chandrasekhar, is set to inaugurate Synopsys’ Chip Design Centre at DLF Tech Park in Noida tomorrow. During this event, the Minister will deliver a special address to an audience comprising senior leadership, employees, partners, and customer delegates of Synopsys.

Established in 1986, Synopsys widely commercialized logic synthesis, revolutionizing the creation of digital designs from language descriptions. This capability propelled the transition of Computer-Aided Design (CAD) into the Electronic Design Automation (EDA) era, facilitating the scaling of digital complexity in line with Moore’s Law. Synopsys has consistently expanded its product portfolio and market position through substantial investments in research and development, coupled with approximately 120 strategic acquisitions. Today, Synopsys is a leading name in EDA, playing a pivotal role in advancing digital chips within the technology ecosystem

Synopsys offers a wide range of design portfolios, spanning from silicon to software, contributing to $5.9 billion in revenue. As a market leader in EDA tools and Interface, Foundation, & Physical IPs, Synopsys holds a significant position in the industry. Demonstrating confidence in Indian design talent, Synopsys has established the second-largest design center in India, extending beyond its headquarters. This center is home to approximately 6,000 engineers from India, constituting 27% of their global design workforce.

While it’s an established fact that 20% of global VLSI/Chip designers are from India, the increasing footprint of Synopsys in Noida, hosting 1650 engineers to begin with, stands as a testament to the growing ecosystem of fabless chip design and innovation in India. Synopsys’ Indian engineers are not only contributing to every aspect of the design cycle of semiconductor chips/IP Cores but are also participating in the success stories of all leading semiconductor companies. Almost all the chips designed by any company use EDA/IP solutions in one way or another.

The nation is advancing to fulfill the vision set by Hon’ble Prime Minister Modi, which emphasizes that “Design in India is as crucial as Make in India.” This vision is currently being executed and championed by Minister Rajeev Chandrasekhar through several initiatives. These include SemiconIndia futureDESIGN, Digital India RISC-V (DIR-V) Program, and the India Semiconductor Research Center (ISRC).